RF SiP Design Verification Flow with Quadruple LO Down Converter SiP

The wireless industry trend toward higher integration and RF component miniaturization has been driving ongoing technology innovations, especially for substrate, interconnect, and packaging technologies. RF Systemin-Package (RF SiP) is one of those leading technology innovations. RF SiP is usually a sub-system unit, and it typically consists of multiple dies with or without passive components generally constructed from embedded passives (EP) and SMT technology. However some passive circuits can also be constructed from integrated passive device (IPD) technology, especially when space requirements are tight or a higher Q is needed. From a historical perspective, RF SiP is not a totally new technology because MultiChip Modules (MCM) and RF modules have been on the market for years and are considered an RF SiP technology. RF SiP typically provides better integration flexibility, faster time to market, and lower product development costs than System-on-Chip (SoC) by mixing and matching existing designs (ICs) and using best-in-class technologies. Nevertheless there are still ongoing debates about the strengths and future of SiP versus SoC. It is clear, however, that there is a very strong market demand for RF SiP. It is perhaps too early to predict which technology will dominate the market in the future, but it is fair to say that SiP will be a hot technology and market over the next several years. This article presents an RF SiP design verification flow with a quadrupled LO down converter RF SiP. Agilent Technologies’ ADS (Advanced Design System) and EMDS (Electromagnetic Design System) are used to design the SiP. ADS includes circuit/system simulators and a layout package for RFICs, MMICs, RF boards, SI (Signal Integrity), RF SiP, and RF module applications. EMDS is 3-D, full-wave electromagnetic simulation software.